The present disclosure relates generally to semiconductor manufacturing. Specifically, the present disclosure relates to an electrical connection between a semiconductor substrate and a top cap.
The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component that can be created using a fabrication process) has decreased.
Microelectromechanical systems (MEMS) devices are very small electro-mechanical systems incorporated into semiconductor IC circuits. These MEMS devices commonly have a top-cap secured to the MEMS device to enclose, secure and/or protect the MEMS device. However, the traditional bonding to secure the cap to the MEMS device electrically insulates the substrate device from the cap device. Therefore, to electrically couple the top cap to the substrate and, as such, reduce static electrical potential between the substrate and the cap, secondary operations are traditionally performed to form an electrical path between the top cap and the substrate. For example, wires may be bonded between a metal surface on the cap and a conductive ground element of the substrate. In another example, a deep groove is cut through the top cap and into the substrate. A metal surface is then formed in the groove to provide electrical conductivity between the top cap and the substrate.
These secondary operations of bonding wires and cutting grooves are time consuming, expensive and add a possibility of part defects. Therefore, what is needed is an improved system for electrical conductivity between a semiconductor and a top cap.